Architecture reconfigurable CBDRA basée sur l'opérateur CORDIC pour le traitement du signal: Application aux récepteurs MIMO
Résumé
"This article addresses the realization of reconfigurable architectures to answer the communication system requirement like high performance on data rate and flexibility supporting the evolution of future systems. We are particularly interested in MIMO applications. The proposed architectures use CORDIC (COordinate Rotation DIgital Computing) operator as common operator. Also the static and partial reconfiguration of FPGA is performed in view of an optimization and dynamic adaptation of hardware resources according to communication system specifications. The number of CORDIC operators can be changed by static reconfiguration to adapt to different MIMO receivers and different required data rate. The interconnections between CORDIC operators can be changed by partial and dynamic FPGA reconfiguration to optimize the hardware resources. The impact of step number of CORDIC operator on BER and MSE is also studied. Three MIMO receivers are realized in this architecture: V-BLAST Square Root, MMSE and CMA. The use of these architectures allows reducing the hardware resources without BER and MSE degradation."