Convertisseur analogique-numérique delta-sigma
Abstract
The invention relates on a sigma delta digital to analog converter, digitally sequenced by a clock, comprising a main line and a feedback line, the main line comprising: an input port, a linear filter G(z) and a multibit quantifier, a digital to analog converter, an output port, and the feedback line comprising a correcting memory table, able to process a correcting signal, and an adder able to subtract said correcting signal from an input signal, wherein the correcting memory table time cycle is k times greater than the clock time cycle.