Hardware/Software codesign guidelines for System on Chip FPGA-based sensorless AC drive applications

Imen Bahri (1, 1) , Lahoucine Idkhajine (2) , Eric Monmasson (2) , Mohamed El Amine Benkhelifa (3)

1 LGEP - Laboratoire de génie électrique de Paris
2 SATIE - Systèmes et Applications des Technologies de l'Information et de l'Energie
3 ETIS - UMR 8051 - Equipes Traitement de l'Information et Systèmes

This paper aims to provide Hardware/Software (Hw/Sw) codesign guidelines for system-on-chip field-programmable gate array-based sensorless ac drive applications. Among these guidelines, an efficient Hw/Sw partitioning procedure is presented. This Hw/Sw partitioning is performed taking into account both the control requirements (bandwidth and stability margin) and the architectural constraints (e.g., available area, memory, and hardware multipliers). A nondominated sorting genetic algorithm (NSGA-II) is used to solve the corresponding multi-objective optimization problem. The proposed Hw/Sw partitioning approach is then validated on a sensorless control algorithm for a synchronous motor based on an extended Kalman filter. Among the nondominated implementation solutions supplied by the NSGA-II, those that are considered as the most interesting are synthesized. Their time/area performances after synthesis are compared with success to their predictions. In addition, one of these optimal solutions is also tested on an experimental setup.

Domains: Engineering Sciences [physics]

Imen Bahri, Lahoucine Idkhajine, Eric Monmasson, Mohamed El Amine Benkhelifa. Hardware/Software codesign guidelines for System on Chip FPGA-based sensorless AC drive applications. IEEE Transactions on Industrial Informatics, 2013, 9 (4), pp.2165-2176. ⟨10.1109/TII.2013.2245908⟩. ⟨hal-00932613⟩