0.18-µm CMOS Driver Optimization for Maximum Data Rate under Power and Area Constraints - CentraleSupélec Accéder directement au contenu
Communication Dans Un Congrès Année : 2016

0.18-µm CMOS Driver Optimization for Maximum Data Rate under Power and Area Constraints

Résumé

This paper presents a Mach-Zehnder-based transmitter in 0.18 µm CMOS. An asymmetric driver is proposed to achieve a large output swing on the optical modulator. The logical effort method was applied on each driver block in order to optimize the propagation delay. The driver characteristics are analyzed based on slew-rate limitation. The speed-power-area trade-off is highlighted and enables to adjust the driver design according to specified constraints. Driver performance obtained with early-design-stage equations is compared to post-layout simulations. Good agreement is demonstrated which validates the proposed sizing methodology.
Fichier principal
Vignette du fichier
PID4217279.pdf (578.36 Ko) Télécharger le fichier
Audrey.pdf (53.41 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-01357884 , version 1 (30-08-2016)

Licence

Copyright (Tous droits réservés)

Identifiants

Citer

Audrey Michard, Pietro Maris Ferreira, Jean-François Carpentier. 0.18-µm CMOS Driver Optimization for Maximum Data Rate under Power and Area Constraints. 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS), Jun 2016, Vancouver, Canada. pp.1-4, ⟨10.1109/NEWCAS.2016.7604760⟩. ⟨hal-01357884⟩
115 Consultations
217 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More