Impact of the DC cable models on the SVD analysis of a Multi-Terminal HVDC system

Samy Akkari 1 Eduardo Prieto-Araujo 2 Jing Dai 1 Oriol Gomis-Bellmunt 2 Xavier Guillaud 3
1 GeePs - Laboratoire Génie électrique et électronique de Paris
2 Centre d'Innovació Tecnològica en Convertidors Estàtics i Accionaments (CITCEA-UPC), Universitat Politècnica de Catalunya, ETS d'Enginyeria Industrial de Barcelona
3 L2EP - Laboratoire d’Électrotechnique et d’Électronique de Puissance - EA 2697
Abstract : High Voltage Direct Current (HVDC) grids are complex Multi-Inputs Multi-Outputs (MIMO) systems whose dynamics are difficult to assess. This paper first describes the modelling of VSC-based Multi-Terminal HVDC systems (MTDC) using different existing cable models. It then recalls the benefits of the Singular Value Decomposition (SVD) approach for the frequency analysis of such systems, and describes how to perform an SVD analysis on a Multi-Terminal HVDC (MTDC) system from its state-space representation. The paper discusses the results of the SVD analysis with regards to the selection of the voltage-droop parameter and the DC voltage constraint of the DC grid. It then emphasises the impact of the choice of the DC cable model on the results of the SVD study and illustrates the cable model influence on the MTDC system through an Electro-Magnetic Transient (EMT) simulation.
Keywords : Gain Power conversion Voltage control HVDC transmission Transfer functions MIMO
Type de document :
Communication dans un congrès
2016 Power Systems Computation Conference (PSCC), Jun 2016, Gênes, Italy. 2016, 2016 Power Systems Computation Conference (PSCC) 〈10.1109/PSCC.2016.7541034〉
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https://hal-centralesupelec.archives-ouvertes.fr/hal-01423717
Contributeur : Jing Dai <>
Soumis le : samedi 31 décembre 2016 - 09:49:06
Dernière modification le : jeudi 5 avril 2018 - 12:30:24

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CENTRALESUPELEC | UPMC | GEEPS | ECO2 | UNIV-PARIS-SACLAY

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Samy Akkari, Eduardo Prieto-Araujo, Jing Dai, Oriol Gomis-Bellmunt, Xavier Guillaud. Impact of the DC cable models on the SVD analysis of a Multi-Terminal HVDC system. 2016 Power Systems Computation Conference (PSCC), Jun 2016, Gênes, Italy. 2016, 2016 Power Systems Computation Conference (PSCC) 〈10.1109/PSCC.2016.7541034〉. 〈hal-01423717〉

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