An ultra-thin SiO2 ALD layer for void-free bonding of III–V material on silicon

A. Talneau (1) , K. Pantzas (1) , A. Durnez (1) , G. Patriarche (1) , D. Alamarguy (2) , E. Le Bourhis (3)

1 LPN - Laboratoire de photonique et de nanostructures
2 GeePs - Laboratoire Génie électrique et électronique de Paris
3 PPRIME - Institut Pprime

Keywords: ALD process; Dangling bonds; Hybrid interface; Hybrid bonding; XPS X-ray Photoélectron Spectroscopy; III-V on Silicon; SiO2 ALD layer

Domains: Engineering Sciences [physics]; Materials; Engineering Sciences [physics]; Optics / Photonic; Engineering Sciences [physics]; Micro and nanotechnologies/Microelectronics

A. Talneau, K. Pantzas, A. Durnez, G. Patriarche, D. Alamarguy, et al.. An ultra-thin SiO2 ALD layer for void-free bonding of III–V material on silicon. Microelectronic Engineering, 2016, 162, pp.40 - 44. ⟨10.1016/j.mee.2016.05.001⟩. ⟨hal-01449032⟩