Tiny companion testchip for 56 Gbaud applications based on microring resonators
Abstract
Objective: To address 56G external I/Os issues
• Purpose: IP core for customer at packaging level
• Tiny and configurable companion testchips
• 3D assembly validation
• Passive & active components of PIC25G + BiCMOS/CMOS
Thesis schedule: Dynamic testchip at wafer-level with 3D assembly
• CMOS driver in B55 at 10-25 Gbps
• Ring resonator modeling
• Qualification testchips based on microring resonators for 56 Gbps applications
Origin : Files produced by the author(s)