Protection of heterogeneous architectures on FPGAs: An approach based on hardware firewalls
Abstract
Embedded systems are parts of our daily life and used in many fields. They can be found in smart-
phones or in modern cars including GPS, light/rain sensors and other electronic assistance mechanisms.
These systems may handle sensitive data (such as credit card numbers, critical information about the
host system and so on) which must be protected against external attacks as these data may be transmit-
ted through a communication link where attackers can connect to extract sensitive information or inject
malicious code within the system. This work presents an approach to protect communications in multi-
processor architectures. This approach is based on hardware security enhancements acting as firewalls.
These firewalls filter all data going through the system communication bus and an additional flexible
cryptographic block aims to protect external memory from attacks. Benefits of our approach are demon-
strated using a case study and some custom software applications implemented in a Field-Programmable
Gate Array (FPGA). Firewalls implemented in the target architecture allow getting a low-latency security
layer with flexible cryptographic features. To illustrate the benefit of such a solution, implementations are
discussed for different MPSoCs implemented on Xilinx Virtex-6 FPGAs. Results demonstrate a reduction
up to 33% in terms of latency overhead compared to existing efforts